1. Field of the Invention
The present invention relates in general to integrated circuits and particular to a system for compensating for temperature induced delay variation in an integrated circuit.
2. Description of Related Art
A typical integrated circuit (IC) tester includes a set of pin electronics circuits, one for carrying out test activities at each terminal of a device under test (DUT). The test activities include sending test signals to the terminals and sampling DUT output signals produced at the terminals. Each pin electronics circuit carries out its test activities in response to timing signals produced by a timing signal generator. Each timing signal controls a separate test action, the pin electronics circuit carrying out the action in response to the timing signal's edges. An IC test is organized into a succession of test cycles during which test activities are carried out at the DUT terminals. The timing signal generator produces each timing signal edge in response to a pulse of a reference clock signal with a programmable delay indicated by an input pattern vector (data value) produced by a pattern generator at the start of each test cycle.
For example, in order for the tester to send a test signal edge to the DUT terminal 1 nanosecond after some particular reference clock signal pulse, the pattern vector must indicate the correct clock signal pulse and must indicate the desired 1 nanosecond delay. However the timing circuit does not wait the entire 1 nanosecond to initiate the timing signal pulse. Since transistor drivers in the signal path of the timing circuit between its clock signal input and its timing signal output must switch on or off when responding to the clock signal, the timing circuit has a fixed inherent signal path delay in addition to its programmable delay. Also transistor logic stages in the signal path of the pin electronics circuit between its input timing signal and its output test signal also have an inherent switching delay. Thus in order for the test signal edge to occur five nanoseconds after the selected reference clock signal edge, the programmable delay of the timing signal generator must calibrated to a value that is slightly less than five nanoseconds to account for the inherent delay of the timing generator as well as the inherent delay of the pin electronics circuit.
Once the timing signal generator is properly calibrated, the inherent signal path delays of timing signal generator and the pin electronics circuit should remain constant during the test. However these inherent signal path delays can change substantially with the temperature of the integrated circuits implementing the timing signal generator and the pin electronics circuit, particularly when they are CMOS integrated circuits.
Some prior art systems avoid temperature induced delay variations in an IC by using feedback control to keep the IC at a constant temperature. In such systems, a controller senses the temperature of an IC and supplies power to a heater which may be attached to the IC or formed by transistors within the IC itself. When the sensed temperature increases above a desired set point, the controller reduces or turns off the heater power. When the sensed temperature decreases below the set point, the controller increases or turns on the heater power. Some of these systems sense IC temperature by sensing the voltage across a temperature sensitive resistor formed on the IC. Other systems sense temperature by sensing the temperature dependent frequency of oscillation of a ring oscillator formed on the IC or by sensing the temperature dependent signal transit time of a signal traveling through a reference delay circuit formed on the IC. These temperature controlling systems are expensive because IC heaters are expensive. Also, since they cause an IC to operate at a relatively high constant temperature, they can reduce the operating life of the IC.
Other feedback control systems do not try to directly control IC temperature but instead monitor switching speed of the transistors forming the signal path within the IC and control that switching speed by controlling the power supply to those transistors. A transistor's switching speed varies with its power supply voltage. For example, some of these systems sense the frequency of a ring oscillator formed on the IC and adjust the IC power supply to maintain the ring oscillator frequency at a desired level. If the transistors forming the ring oscillator are similar to the transistors forming the signal path and share the same power supply, then by holding the ring oscillator frequency constant despite changes in IC temperature, the signal path delay is also held constant. While such systems do not require that the IC operate at high temperatures, they employ relatively complicated ring oscillators and/or reference delay circuits on the IC which increase the cost and difficulty of IC design and fabrication. Such systems also require the use of relatively complicated phase lock loop controllers which further add to system cost.
Thus although the prior art delay compensation systems work reasonably well, they are expensive to implement. What is needed is an inexpensive and easy to implement system for compensating for temperature induced delay variation in an IC.